What is SCI?
SCI stands for Scalable Coherent Interface, an ANSI/IEEE
standard for the interconnection of computer components. This interconnect architecture
allows processors, memories, and I/O devices be clustered into large distributed
multiprocessor systems. SCI allows us to build scalable distributed systems based on both
shared-memory and message-passing models.
Computer buses have served us for half a century but are now reaching
their fundamental scalability limits. SCI combines the best of buses and networks in a
unique way to overcome their limitations. It uses 16 bit wide point to point
unidirectional interconnect, transferring data at a blazing 500 MHz achieving one gigabyte
per second transfer rate.
The basic transfer unit in SCI is a packet, to eliminate the overhead of
bus-cycles. The packet transport protocol guarantees forward progress. The optional cache
coherency protocol is based upon distributed directory scheme using split-response
transactions.
We have several products based on SCI standard,
 | SCILINC-001, the cost PCI to SCI bus bridge with DMA engine. |
 | EtherLinc-001, Low cost general purpose SCI bus Linc layer controller. |
 | LincChip-8, 8-bit SCI bus Linc layer
protocol core. |
 | LincChip-16, 16-bit SCI bus Linc layer protocol engine. |
|
SCI could best be
described as "Local Area Multi-Processing".
Extensive information on SCI and related standards/activities is
maintained by SCIzzL, the SLDRAM Trade
Association, and the Association of Scalable Coherent Interface Local Area MultiProcessor
Users, Developers, and Manufacturers.
Here is a SCIzzL link
explains SCI. |