| In recent years as operating systems and
applications demanded more performance, the data bottleneck between the processor and its
peripherals in standard PC I/O architectures became prominant. The PCI local bus
architecture allows the peripheral functions with high bandwidth requirements stay closer
to the system’s processor bus and eliminate this bottleneck. Today's PC industry has
adopted PCI standard to simplify designs, reduce costs, and increase the selection of
local bus components and add-in cards. The PCI component and add-in card interface is processor independent, enabling an efficient transition to future processor generations and use with multiple processor architectures. Processor independence allows the PCI Local Bus to be optimized for I/O functions, enables concurrent operation of the local bus with the processor-memory subsystem, and accommodates multiple high performance peripherals. We have several products based on PCI standard,
|
The PCI Local Bus is a high performance bus
with multiplexed address and data lines. The bus is used as an interconnect mechanism
between highly integrated peripheral controller components, peripheral add-in boards, and
processor-memory systems. PCI is a synchronus multi-master bus design with overlapped arbitration. The data transfer in PCI bus occurs in bursts to achive high bandwidth. It is also based on plug and play concept as it supports full auto-configration. The address space in a PCI peripheral is relocatable which eliminates manual configuartion with dip-switches and jumpers as it was done in legacy ISA bus peripherals. PCI is a industry standard and maintained by PCI Special Interest Group. Extensive information about PCI is available at their web site, www.pcisig.com. |
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Last modified: December 29, 2006