ISS announces low-cost high-performance working interconnect silicon based on IEEE standard.
ISS announces low-cost high-performance working interconnect silicon based on IEEE SCI standard which will benefit system developers from low latency and 400 megabytes per second total bandwidth in clustering, networking, I/O, and embedded applications.
Lake Forest, CA -- March 8, 1998 -- Interconnect Systems Solution, a premier provider of low cost interconnect announces working first silicon based on the SCI LincChip-8™ technology fabricated in a 0.5 micron process. The chip is transferring packetized data at 100 megabytes per second through both send and receive ports, a total 200 megabytes per second in a ring network consisting of multiple nodes on a 8-bit wide SCI interface. This technology is fully compliant to the SCI (Scalable Coherent Interface) standard (P1596 and P1596.3), does automatic ringlet network initialization in hardware at startup time and supports up to 8 concurrent packet transfers for under 25K gates.
The small RISC-like design of SCI LincChip-8 with simultaneous data send receive capability and on-chip I/O transceivers make it even a good fit for embedded applications. The high bandwidth makes it a great candidate for low-latency networking and also I/O connectivity for multimedia, disk or peripheral attach.
This 8-bit wide interface would fit very well on the VME P2 connector and able to serve as a high speed auxiliary interconnect for board to board or extended seamlessly from rack to rack for VME environment as well.
This technology will be an excellent means for implementing VI-Architecture which can provide a low-cost solution for industry standard desktop clustering. As one of the early contributors of the VI-Architecture intiative ISS will firmly supprot the need in the desktop clustering market with its SCI cores and chips.
"ISS has developed its low cost SCI core technology called SCI LincChip-8 and made it available for licensing for about a year and half now. The goal of this technology is to take advantage of low cost mainstream CMOS process for high speed interconnect and I have great news to share!" said Khan Kibria, President of ISS. He added, "Now ISS is in a position to go ahead and fabricate a low cost general purpose off-the-shelf SCI chip based on LincChip-8 in 0.35 micron process ASAP."
This general purpose SCI chip will be targeted for a improved 200 megabytes per second through both send and receive ports, a total of 400 megabytes per second because of the faster silicon process. This data rate can be applied across low-cost commodity cable-connectors of up to 30 meters long quite comfortably which is driven directly by the on-chip transceivers without the need for any external components.
About Scalable Coherent Interface
SCI is a IEEE standard, standardized in 1992. Computer companies are using SCI based products and achieving cost-performance goals otherwise would be difficult to achieve. More information on SCI can be found at SCIzzL: the Scalable Coherent Interface Local Area MultiProcessor Users, Developers, and anufacturers Association, and the SLDRAM (formerly SyncLink) Trade Association on the Internet World Wide Web at http://www.scizzl.com.
About VI-Architecture
The Virtual Interface (VI) Architecture defines industry-standard architecture for communication within clusters of servers and workstations. These clusters enable enterprise-class performance and scalability utilizing standards-based servers as building blocks. More information on VI can be obtained on the Internet World Wide Web at http://www.viarch.org.
About Interconnect Systems Solution
ISS was founded in 1995, in Mission Viejo, California, with a goal to provide bus
interconnect/networking cores, chips, and interface boards and design productivity tools.
The company can be reached on the Internet World Wide Web at http://www.iss-us.com.
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Interconnect Systems Solution
26215 Camino Adelanto, Mission Viejo, California 92691, USA.
Tel: 949-916-9437
FAX: 949-916-9537
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Last modified: December 29, 2006